Heads on branch cdrx

kisskb

Revisions | Branches | Compilers | Configs | Build Results | Build Failures |
Description Progress Successful Hash Gitweb
mtd: spi-nor: aspeed: introduce optimized settings for fast reads 100% 223/215 94% 211/223 cbf5c33ba2f308fc9a42
mtd: spi-nor: aspeed: limit the maximum SPI frequency 100% 223/215 94% 211/223 e30034551410432f84fb
ARM: dts: aspeed: add a AHB clock to the SMC controllers 100% 263/215 96% 253/263 b528649730396317768a
ARM: dts: aspeed: add a AHB clock to the SMC controllers 100% 261/215 96% 251/261 5e2e2a3ce63b06bcdc3b
dt-bindings leds: add pca955x 100% 261/215 97% 255/261 9ea1e4c5576d931fccd4
dt-bindings leds: add pca955x 100% 261/215 97% 255/261 a90a7bc2f157e0498a8f
dt-bindings leds: add pca955x 100% 261/215 97% 255/261 7e53b14c96198df978e6
dt-bindings leds: add pca955x 100% 261/215 91% 239/261 7c5fdcb7d69a1abfa207
leds: pca955x: add GPIO support 100% 261/215 96% 251/261 23d1f60a4fa3d00e38c7
ARM: dts: aspeed: add OpenBMC flash layout 100% 263/215 97% 256/263 fc7dda44b0afc1843443
ARM: dts: aspeed: add OpenBMC flash layout 100% 263/215 97% 256/263 6bb1647b975b47083616
ARM: dts: aspeed: add OpenBMC flash layout 100% 263/215 96% 255/263 a41e0289c0430695aeef
ARM: dts: aspeed: add ahb_clk to g4 SoC 100% 263/215 97% 256/263 512d95af28d0ee914e0c
ARM: dts: aspeed: add ahb_clk to g4 SoC 100% 263/215 97% 256/263 71910d2748042543efc4
mtd: spi-nor: aspeed: configure chip window on AHB bus 100% 263/215 97% 256/263 ba97e86a81f07a2a6a96
mtd: spi-nor: aspeed: configure chip window on AHB bus 100% 263/215 96% 254/263 05692de8307a467e1430
add a const to ioread* routines to fix compile testing 100% 263/215 96% 254/263 6718156158684affb657
powerpc/boot: add support for 64bit little endian wrapper 94% 204/215 94% 193/204 c411beeb8dd2ff4e8061
© Michael Ellerman 2006-2018.