# git rev-parse -q --verify 00873c9de7e1dbe1201296a002b27d3b9268e772^{commit}
00873c9de7e1dbe1201296a002b27d3b9268e772
already have revision, skipping fetch
# git checkout -q -f -B kisskb 00873c9de7e1dbe1201296a002b27d3b9268e772
# git clean -qxdf
# < git log -1
# commit 00873c9de7e1dbe1201296a002b27d3b9268e772
# Author: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
# Date:   Sun Mar 18 16:35:58 2018 +0530
# 
#     powerpc/mm/hash: Don't memset pgd table if not needed
#     
#     We need to zero-out pgd table only if we share the slab cache with
#     pud/pmd level caches. With the support of 4PB, we don't share the slab
#     cache anymore. Instead of removing the code completely hide it within
#     an #ifdef. We don't need to do this with any other page table level,
#     because they all allocate table of double the size and we take of
#     initializing the first half corrrectly during page table zap.
#     
#     Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
#     [mpe: Consolidate multiple #if / #ifdef into one]
#     Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
# < /opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux-gcc --version
# < git log --format=%s --max-count=1 00873c9de7e1dbe1201296a002b27d3b9268e772
# < make -s -j 48 ARCH=microblaze O=/kisskb/build/powerpc-next_mmu_defconfig_microblaze CROSS_COMPILE=/opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux-  mmu_defconfig
# make -s -j 48 ARCH=microblaze O=/kisskb/build/powerpc-next_mmu_defconfig_microblaze CROSS_COMPILE=/opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux-  
Kernel: arch/microblaze/boot/linux.bin is ready  (#1)
Completed OK
# rm -rf /kisskb/build/powerpc-next_mmu_defconfig_microblaze
# Build took: 0:00:45.019836