Buildresult: powerpc-next/ppc64_defconfig+UP/powerpc-gcc5 built on Dec 21 2018, 22:49

kisskb

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Status:	OK
Date/Time:	Dec 21 2018, 22:49
Duration:	0:02:48.251604
Builder:	ka1
Revision:	vfio_pci: Add NVIDIA GV100GL [Tesla V100 SXM2] subdriver (`7f92891778dff62303c070ac81de7b7d80de331a)`
Target:	powerpc-next/ppc64_defconfig+UP/powerpc-gcc5
Branch:	powerpc-next
Compiler:	powerpc-gcc5 (powerpc64-linux-gcc (GCC) 5.5.0 / GNU ld (GNU Binutils) 2.29.1.20170915)
Config:	ppc64_defconfig+UP (download)
Log:	Download original No warnings found in log. Full Log # git rev-parse -q --verify 7f92891778dff62303c070ac81de7b7d80de331a^{commit} 7f92891778dff62303c070ac81de7b7d80de331a already have revision, skipping fetch # git checkout -q -f -B kisskb 7f92891778dff62303c070ac81de7b7d80de331a # git clean -qxdf # < git log -1 # commit 7f92891778dff62303c070ac81de7b7d80de331a # Author: Alexey Kardashevskiy <aik@ozlabs.ru> # Date: Thu Dec 20 12:10:36 2018 +1100 # # vfio_pci: Add NVIDIA GV100GL [Tesla V100 SXM2] subdriver # # POWER9 Witherspoon machines come with 4 or 6 V100 GPUs which are not # pluggable PCIe devices but still have PCIe links which are used # for config space and MMIO. In addition to that the GPUs have 6 NVLinks # which are connected to other GPUs and the POWER9 CPU. POWER9 chips # have a special unit on a die called an NPU which is an NVLink2 host bus # adapter with p2p connections to 2 to 3 GPUs, 3 or 2 NVLinks to each. # These systems also support ATS (address translation services) which is # a part of the NVLink2 protocol. Such GPUs also share on-board RAM # (16GB or 32GB) to the system via the same NVLink2 so a CPU has # cache-coherent access to a GPU RAM. # # This exports GPU RAM to the userspace as a new VFIO device region. This # preregisters the new memory as device memory as it might be used for DMA. # This inserts pfns from the fault handler as the GPU memory is not onlined # until the vendor driver is loaded and trained the NVLinks so doing this # earlier causes low level errors which we fence in the firmware so # it does not hurt the host system but still better be avoided; for the same # reason this does not map GPU RAM into the host kernel (usual thing for # emulated access otherwise). # # This exports an ATSD (Address Translation Shootdown) register of NPU which # allows TLB invalidations inside GPU for an operating system. The register # conveniently occupies a single 64k page. It is also presented to # the userspace as a new VFIO device region. One NPU has 8 ATSD registers, # each of them can be used for TLB invalidation in a GPU linked to this NPU. # This allocates one ATSD register per an NVLink bridge allowing passing # up to 6 registers. Due to the host firmware bug (just recently fixed), # only 1 ATSD register per NPU was actually advertised to the host system # so this passes that alone register via the first NVLink bridge device in # the group which is still enough as QEMU collects them all back and # presents to the guest via vPHB to mimic the emulated NPU PHB on the host. # # In order to provide the userspace with the information about GPU-to-NVLink # connections, this exports an additional capability called "tgt" # (which is an abbreviated host system bus address). The "tgt" property # tells the GPU its own system address and allows the guest driver to # conglomerate the routing information so each GPU knows how to get directly # to the other GPUs. # # For ATS to work, the nest MMU (an NVIDIA block in a P9 CPU) needs to # know LPID (a logical partition ID or a KVM guest hardware ID in other # words) and PID (a memory context ID of a userspace process, not to be # confused with a linux pid). This assigns a GPU to LPID in the NPU and # this is why this adds a listener for KVM on an IOMMU group. A PID comes # via NVLink from a GPU and NPU uses a PID wildcard to pass it through. # # This requires coherent memory and ATSD to be available on the host as # the GPU vendor only supports configurations with both features enabled # and other configurations are known not to work. Because of this and # because of the ways the features are advertised to the host system # (which is a device tree with very platform specific properties), # this requires enabled POWERNV platform. # # The V100 GPUs do not advertise any of these capabilities via the config # space and there are more than just one device ID so this relies on # the platform to tell whether these GPUs have special abilities such as # NVLinks. # # Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> # Acked-by: Alex Williamson <alex.williamson@redhat.com> # Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> # < /opt/cross/kisskb/korg/gcc-5.5.0-nolibc/powerpc64-linux/bin/powerpc64-linux-gcc --version # < /opt/cross/kisskb/korg/gcc-5.5.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld --version # < git log --format=%s --max-count=1 7f92891778dff62303c070ac81de7b7d80de331a # < make -s -j 48 ARCH=powerpc O=/kisskb/build/powerpc-next_ppc64_defconfig+UP_powerpc-gcc5 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-5.5.0-nolibc/powerpc64-linux/bin/powerpc64-linux- ppc64_defconfig # Added to kconfig CONFIG_SMP=n # yes \n \| make -s -j 48 ARCH=powerpc O=/kisskb/build/powerpc-next_ppc64_defconfig+UP_powerpc-gcc5 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-5.5.0-nolibc/powerpc64-linux/bin/powerpc64-linux- oldconfig yes: standard output: Broken pipe # make -s -j 48 ARCH=powerpc O=/kisskb/build/powerpc-next_ppc64_defconfig+UP_powerpc-gcc5 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-5.5.0-nolibc/powerpc64-linux/bin/powerpc64-linux- Completed OK # rm -rf /kisskb/build/powerpc-next_ppc64_defconfig+UP_powerpc-gcc5 # Build took: 0:02:48.251604

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