Buildresult: linus/malta_defconfig/mips-gcc8 built on Jan 6 2020, 08:01

kisskb

Revisions | Branches | Compilers | Configs | Build Results | Build Failures |

Status:	OK
Date/Time:	Jan 6 2020, 08:01
Duration:	0:02:26.323702
Builder:	ka3
Revision:	Merge tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (`768fc661d12559b0dbd99d941b3bf28fe92fd365)`
Target:	linus/malta_defconfig/mips-gcc8
Branch:	linus
Compiler:	mips-gcc8 (mips-linux-gcc (GCC) 8.1.0 / GNU ld (GNU Binutils) 2.30)
Config:	malta_defconfig (download)
Log:	Download original No warnings found in log. Full Log # git rev-parse -q --verify 768fc661d12559b0dbd99d941b3bf28fe92fd365^{commit} 768fc661d12559b0dbd99d941b3bf28fe92fd365 already have revision, skipping fetch # git checkout -q -f -B kisskb 768fc661d12559b0dbd99d941b3bf28fe92fd365 # git clean -qxdf # < git log -1 # commit 768fc661d12559b0dbd99d941b3bf28fe92fd365 # Merge: 36487907f341 0e194d9da198 # Author: Linus Torvalds <torvalds@linux-foundation.org> # Date: Sun Jan 5 11:15:31 2020 -0800 # # Merge tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux # # Pull RISC-V fixes from Paul Walmsley: # "Several fixes for RISC-V: # # - Fix function graph trace support # # - Prefix the CSR IRQ_* macro names with "RV_", to avoid collisions # with macros elsewhere in the Linux kernel tree named "IRQ_TIMER" # # - Use __pa_symbol() when computing the physical address of a kernel # symbol, rather than __pa() # # - Mark the RISC-V port as supporting GCOV # # One DT addition: # # - Describe the L2 cache controller in the FU540 DT file # # One documentation update: # # - Add patch acceptance guideline documentation" # # * tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: # Documentation: riscv: add patch acceptance guidelines # riscv: prefix IRQ_ macro names with an RV_ namespace # clocksource: riscv: add notrace to riscv_sched_clock # riscv: ftrace: correct the condition logic in function graph tracer # riscv: dts: Add DT support for SiFive L2 cache controller # riscv: gcov: enable gcov for RISC-V # riscv: mm: use __pa_symbol for kernel symbols # < /opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux-gcc --version # < /opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux-ld --version # < git log --format=%s --max-count=1 768fc661d12559b0dbd99d941b3bf28fe92fd365 # < make -s -j 80 ARCH=mips O=/kisskb/build/linus_malta_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- malta_defconfig # make -s -j 80 ARCH=mips O=/kisskb/build/linus_malta_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- Completed OK # rm -rf /kisskb/build/linus_malta_defconfig_mips-gcc8 # Build took: 0:02:26.323702

© Michael Ellerman 2006-2018.