# git rev-parse -q --verify 7008ee121089b8193aea918b98850fe87d996508^{commit}
7008ee121089b8193aea918b98850fe87d996508
already have revision, skipping fetch
# git checkout -q -f -B kisskb 7008ee121089b8193aea918b98850fe87d996508
# git clean -qxdf
# < git log -1
# commit 7008ee121089b8193aea918b98850fe87d996508
# Merge: 11a827294755 fc585d4a5cf6
# Author: Linus Torvalds <torvalds@linux-foundation.org>
# Date:   Sun Jan 19 12:10:28 2020 -0800
# 
#     Merge tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
#     
#     Pull RISC-V fixes from Paul Walmsley:
#      "Three fixes for RISC-V:
#     
#        - Don't free and reuse memory containing the code that CPUs parked at
#          boot reside in.
#     
#        - Fix rv64 build problems for ubsan and some modules by adding
#          logical and arithmetic shift helpers for 128-bit values. These are
#          from libgcc and are similar to what's present for ARM64.
#     
#        - Fix vDSO builds to clean up their own temporary files"
#     
#     * tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
#       riscv: Less inefficient gcc tishift helpers (and export their symbols)
#       riscv: delete temporary files
#       riscv: make sure the cores stay looping in .Lsecondary_park
# < /opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-gcc --version
# < /opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-ld --version
# < git log --format=%s --max-count=1 7008ee121089b8193aea918b98850fe87d996508
# < make -s -j 48 ARCH=xtensa O=/kisskb/build/linus_xtensa-defconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-  defconfig
# make -s -j 48 ARCH=xtensa O=/kisskb/build/linus_xtensa-defconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-  
Completed OK
# rm -rf /kisskb/build/linus_xtensa-defconfig_xtensa
# Build took: 0:00:30.043118