# git rev-parse -q --verify b0be0eff1a5ab77d588b76bd8b1c92d5d17b3f73^{commit}
b0be0eff1a5ab77d588b76bd8b1c92d5d17b3f73
already have revision, skipping fetch
# git checkout -q -f -B kisskb b0be0eff1a5ab77d588b76bd8b1c92d5d17b3f73
# git clean -qxdf
# < git log -1
# commit b0be0eff1a5ab77d588b76bd8b1c92d5d17b3f73
# Merge: 3d3b44a61a9c a84de2fa962c
# Author: Linus Torvalds <torvalds@linux-foundation.org>
# Date:   Mon Jan 27 17:28:52 2020 -0800
# 
#     Merge tag 'x86-pti-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
#     
#     Pull x86 pti updates from Thomas Gleixner:
#      "The performance deterioration departement provides a few non-scary
#       fixes and improvements:
#     
#        - Update the cached HLE state when the TSX state is changed via the
#          new control register. This ensures feature bit consistency.
#     
#        - Exclude the new Zhaoxin CPUs from Spectre V2 and SWAPGS
#          vulnerabilities"
#     
#     * tag 'x86-pti-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
#       x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability
#       x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2
#       x86/cpu: Update cached HLE state on write to TSX_CTRL_CPUID_CLEAR
# < /opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-gcc --version
# < /opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-ld --version
# < git log --format=%s --max-count=1 b0be0eff1a5ab77d588b76bd8b1c92d5d17b3f73
# < make -s -j 24 ARCH=xtensa O=/kisskb/build/linus_xtensa-defconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-  defconfig
# make -s -j 24 ARCH=xtensa O=/kisskb/build/linus_xtensa-defconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-  
Completed OK
# rm -rf /kisskb/build/linus_xtensa-defconfig_xtensa
# Build took: 0:00:25.685334