# git rev-parse -q --verify a42a7bb6f5362c77f38cdc5e2d05e9fe0c2ade2c^{commit} a42a7bb6f5362c77f38cdc5e2d05e9fe0c2ade2c already have revision, skipping fetch # git checkout -q -f -B kisskb a42a7bb6f5362c77f38cdc5e2d05e9fe0c2ade2c # git clean -qxdf # < git log -1 # commit a42a7bb6f5362c77f38cdc5e2d05e9fe0c2ade2c # Merge: 34d5a4b336e7 92c227554c8e # Author: Linus Torvalds # Date: Sun Mar 15 13:15:16 2020 -0700 # # Merge tag 'irq-urgent-2020-03-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip # # Pull irq fix from Thomas Gleixner: # "A single commit to handle an erratum in Cavium ThunderX to prevent # access to GIC registers which are broken in the implementation" # # * tag 'irq-urgent-2020-03-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: # irqchip/gic-v3: Workaround Cavium erratum 38539 when reading GICD_TYPER2 # < /opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux-gcc --version # < /opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux-ld --version # < git log --format=%s --max-count=1 a42a7bb6f5362c77f38cdc5e2d05e9fe0c2ade2c # < make -s -j 8 ARCH=microblaze O=/kisskb/build/linus_mmu_defconfig_microblaze CROSS_COMPILE=/opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux- mmu_defconfig # < make -s -j 8 ARCH=microblaze O=/kisskb/build/linus_mmu_defconfig_microblaze CROSS_COMPILE=/opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux- help # make -s -j 8 ARCH=microblaze O=/kisskb/build/linus_mmu_defconfig_microblaze CROSS_COMPILE=/opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux- olddefconfig # make -s -j 8 ARCH=microblaze O=/kisskb/build/linus_mmu_defconfig_microblaze CROSS_COMPILE=/opt/cross/kisskb/br-microblaze-full-2016.08-613-ge98b4dd/bin/microblazeel-linux- Kernel: arch/microblaze/boot/linux.bin is ready (#1) Completed OK # rm -rf /kisskb/build/linus_mmu_defconfig_microblaze # Build took: 0:01:53.770664