# git rev-parse -q --verify 6f630784cc0d92fb58ea326e2bc01aa056279ecb^{commit} 6f630784cc0d92fb58ea326e2bc01aa056279ecb already have revision, skipping fetch # git checkout -q -f -B kisskb 6f630784cc0d92fb58ea326e2bc01aa056279ecb # git clean -qxdf # < git log -1 # commit 6f630784cc0d92fb58ea326e2bc01aa056279ecb # Merge: 3a2a87517421 9ac1eafa885a # Author: Linus Torvalds # Date: Wed Jun 10 11:42:19 2020 -0700 # # Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux # # Pull clk updates from Stephen Boyd: # "This time around we have four lines of diff in the core framework, # removing a function that isn't used anymore. Otherwise the main new # thing for the common clk framework is that it is selectable in the # Kconfig language now. Hopefully this will let clk drivers and clk # consumers be testable on more than the architectures that support the # clk framework. The goal is to introduce some Kunit tests for the # framework. # # Outside of the core framework we have the usual set of various driver # updates and non-critical fixes. The dirstat shows that the new # Baikal-T1 driver is the largest addition this time around in terms of # lines of code. After that the x86 (Intel), Qualcomm, and Mediatek # drivers introduce many lines to support new or upcoming SoCs. After # that the dirstat shows the usual suspects working on their SoC support # by fixing minor bugs, correcting data and converting some of their DT # bindings to YAML. # # Core: # - Allow the COMMON_CLK config to be selectable # # New Drivers: # - Clk driver for Baikal-T1 SoCs # - Mediatek MT6765 clock support # - Support for Intel Agilex clks # - Add support for X1830 and X1000 Ingenic SoC clk controllers # - Add support for the new Renesas RZ/G1H (R8A7742) SoC # - Add support for Qualcomm's MSM8939 Generic Clock Controller # # Updates: # - Support IDT VersaClock 5P49V5925 # - Bunch of updates for HSDK clock generation unit (CGU) driver # - Start making audio and GPU clks work on Marvell MMP2/MMP3 SoCs # - Add some GPU, NPU, and UFS clks to Qualcomm SM8150 driver # - Enable supply regulators for GPU gdscs on Qualcomm SoCs # - Add support for Si5342, Si5344 and Si5345 chips # - Support custom flags in Xilinx zynq firmware # - Various small fixes to the Xilinx clk driver # - A single minor rounding fix for the legacy Allwinner clock support # - A few patches from Abel Vesa as preparation of adding audiomix # clock support on i.MX # - A couple of cleanups from Anson Huang for i.MX clk-sscg-pll and # clk-pllv3 drivers # - Drop dependency on ARM64 for i.MX8M clock driver, to support # aarch32 mode on aarch64 hardware # - A series from Peng Fan to improve i.MX8M clock drivers, using # composite clock for core and bus clk slice # - Set a better parent clock for flexcan on i.MX6UL to support CiA102 # defined bit rates # - A couple changes for EMC frequency scaling on Tegra210 # - Support for CPU frequency scaling on Tegra20/Tegra30 # - New clk gate for CSI test pattern generator on Tegra210 # - Regression fixes for Samsung exynos542x and exynos5433 SoCs # - Use of fallthrough; attribute for Samsung s3c24xx # - Updates and fixup HDMI and video clocks on Meson8b # - Fixup reset polarity on Meson8b # - Fix GPU glitch free mux switch on Meson gx and g12 # - A minor fix for the currently unused suspend/resume handling on # Renesas RZ/A1 and RZ/A2 # - Two more conversions of Renesas DT bindings to json-schema # - Add support for the USB 2.0 clock selector on Renesas R-Car M3-W+" # # * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (155 commits) # clk: mediatek: Remove ifr{0,1}_cfg_regs structures # clk: baikal-t1: remove redundant assignment to variable 'divider' # clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible" # dt-bindings: clock: Add a missing include to MMP Audio Clock binding # dt: Add bindings for IDT VersaClock 5P49V5925 # clk: vc5: Add support for IDT VersaClock 5P49V6965 # clk: Add Baikal-T1 CCU Dividers driver # clk: Add Baikal-T1 CCU PLLs driver # dt-bindings: clk: Add Baikal-T1 CCU Dividers binding # dt-bindings: clk: Add Baikal-T1 CCU PLLs binding # clk: mediatek: assign the initial value to clk_init_data of mtk_mux # clk: mediatek: Add MT6765 clock support # clk: mediatek: add mt6765 clock IDs # dt-bindings: clock: mediatek: document clk bindings vcodecsys for Mediatek MT6765 SoC # dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC # dt-bindings: clock: mediatek: document clk bindings for Mediatek MT6765 SoC # CLK: HSDK: CGU: add support for 148.5MHz clock # CLK: HSDK: CGU: support PLL bypassing # CLK: HSDK: CGU: check if PLL is bypassed first # clk: clk-si5341: Add support for the Si5345 series # ... # < /opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux-gcc --version # < /opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux-ld --version # < git log --format=%s --max-count=1 6f630784cc0d92fb58ea326e2bc01aa056279ecb # < make -s -j 80 ARCH=mips O=/kisskb/build/linus_ip22_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- ip22_defconfig # < make -s -j 80 ARCH=mips O=/kisskb/build/linus_ip22_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- help # make -s -j 80 ARCH=mips O=/kisskb/build/linus_ip22_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- olddefconfig # make -s -j 80 ARCH=mips O=/kisskb/build/linus_ip22_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- Completed OK # rm -rf /kisskb/build/linus_ip22_defconfig_mips-gcc8 # Build took: 0:01:46.699438