# git rev-parse -q --verify 9420f1ce01869409d78901c3e036b2c437cbc6b8^{commit} 9420f1ce01869409d78901c3e036b2c437cbc6b8 already have revision, skipping fetch # git checkout -q -f -B kisskb 9420f1ce01869409d78901c3e036b2c437cbc6b8 # git clean -qxdf # < git log -1 # commit 9420f1ce01869409d78901c3e036b2c437cbc6b8 # Merge: dec1fbbc1d7c 7ee193e2dda3 # Author: Linus Torvalds # Date: Sun Aug 9 12:52:28 2020 -0700 # # Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl # # Pull pin control updates from Linus Walleij: # "This is the bulk of the pin control changes for the v5.9 kernel # series: # # Core changes: # # - The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range() # macro" was put in an immutable branch and merged into the pinctrl # tree as well. We see these changes also here. # # - Improved debug output for pins used as GPIO. # # New drivers: # # - Ocelot Sparx5 SoC driver. # # - Intel Emmitsburg SoC subdriver. # # - Intel Tiger Lake-H SoC subdriver. # # - Qualcomm PM660 SoC subdriver. # # - Renesas SH-PFC R8A774E1 subdriver. # # Driver improvements: # # - Linear improvement and cleanups of the Intel drivers for # Cherryview, Lynxpoint, Baytrail etc. Improved locking among other # things. # # - Renesas SH-PFC has added support for RPC pins, groups, and # functions to r8a77970 and r8a77980. # # - The newere Freescale (now NXP) i.MX8 pin controllers have been # modularized. This is driven by the Google Android GKI initiative I # think. # # - Open drain support for pins on the Qualcomm IPQ4019. # # - The Ingenic driver can handle both edges IRQ detection. # # - A big slew of documentation fixes all over the place. # # - A few irqchip template conversions by yours truly. # # * tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits) # dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC # pinctrl: stmfx: Use irqchip template # pinctrl: amd: Use irqchip template # pinctrl: mediatek: fix build for tristate changes # pinctrl: samsung: Use bank name as irqchip name # pinctrl: core: print gpio in pins debugfs file # pinctrl: mediatek: add mt6779 eint support # pinctrl: mediatek: add pinctrl support for MT6779 SoC # pinctrl: mediatek: avoid virtual gpio trying to set reg # pinctrl: mediatek: update pinmux definitions for mt6779 # pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API # pinctrl: mcp23s08: Use irqchip template # pinctrl: sx150x: Use irqchip template # dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes # pinctrl: intel: Add Intel Emmitsburg pin controller support # pinctl: ti: iodelay: Replace HTTP links with HTTPS ones # Revert "gpio: omap: handle pin config bias flags" # pinctrl: single: Use fallthrough pseudo-keyword # pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword # pinctrl: baytrail: Use fallthrough pseudo-keyword # ... # < /opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc --version # < /opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ld --version # < git log --format=%s --max-count=1 9420f1ce01869409d78901c3e036b2c437cbc6b8 # < make -s -j 48 ARCH=arm O=/kisskb/build/linus_multi_v7_defconfig_arm-gcc4.9 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- multi_v7_defconfig # < make -s -j 48 ARCH=arm O=/kisskb/build/linus_multi_v7_defconfig_arm-gcc4.9 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- help # make -s -j 48 ARCH=arm O=/kisskb/build/linus_multi_v7_defconfig_arm-gcc4.9 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- olddefconfig # make -s -j 48 ARCH=arm O=/kisskb/build/linus_multi_v7_defconfig_arm-gcc4.9 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- /kisskb/src/arch/arm/boot/dts/mmp2.dtsi:472.23-480.6: Warning (spi_bus_bridge): /soc/apb@d4000000/spi@d4037000: incorrect #address-cells for SPI bus also defined at /kisskb/src/arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts:225.7-237.3 /kisskb/src/arch/arm/boot/dts/mmp2.dtsi:472.23-480.6: Warning (spi_bus_bridge): /soc/apb@d4000000/spi@d4037000: incorrect #size-cells for SPI bus also defined at /kisskb/src/arch/arm/boot/dts/mmp2-olpc-xo-1-75.dts:225.7-237.3 arch/arm/boot/dts/mmp2-olpc-xo-1-75.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge' /kisskb/src/arch/arm/crypto/ghash-ce-glue.c: In function 'ghash_do_update': /kisskb/src/arch/arm/crypto/ghash-ce-glue.c:67:44: warning: passing argument 4 of 'pmull_ghash_update_p64' from incompatible pointer type pmull_ghash_update_p64(blocks, dg, src, key->h, head); ^ /kisskb/src/arch/arm/crypto/ghash-ce-glue.c:45:17: note: expected 'const u64 (*)[2]' but argument is of type 'u64 (*)[2]' asmlinkage void pmull_ghash_update_p64(int blocks, u64 dg[], const char *src, ^ /kisskb/src/arch/arm/crypto/ghash-ce-glue.c:69:43: warning: passing argument 4 of 'pmull_ghash_update_p8' from incompatible pointer type pmull_ghash_update_p8(blocks, dg, src, key->h, head); ^ /kisskb/src/arch/arm/crypto/ghash-ce-glue.c:48:17: note: expected 'const u64 (*)[2]' but argument is of type 'u64 (*)[2]' asmlinkage void pmull_ghash_update_p8(int blocks, u64 dg[], const char *src, ^ /kisskb/src/drivers/firmware/qcom_scm-smc.c: In function 'scm_smc_call': /kisskb/src/drivers/firmware/qcom_scm-smc.c:94:9: warning: missing braces around initializer [-Wmissing-braces] struct arm_smccc_args smc = {0}; ^ /kisskb/src/drivers/firmware/qcom_scm-smc.c:94:9: warning: (near initialization for 'smc.args') [-Wmissing-braces] /kisskb/src/drivers/firmware/qcom_scm-legacy.c: In function 'scm_legacy_call': /kisskb/src/drivers/firmware/qcom_scm-legacy.c:139:9: warning: missing braces around initializer [-Wmissing-braces] struct arm_smccc_args smc = {0}; ^ /kisskb/src/drivers/firmware/qcom_scm-legacy.c:139:9: warning: (near initialization for 'smc.args') [-Wmissing-braces] Completed OK # rm -rf /kisskb/build/linus_multi_v7_defconfig_arm-gcc4.9 # Build took: 0:03:41.185324