Buildresult: powerpc-next/versatile_defconfig/arm-gcc4.9 built on Dec 11 2020, 02:20

kisskb

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Status:	OK
Date/Time:	Dec 11 2020, 02:20
Duration:	0:00:30.650852
Builder:	ka4
Revision:	powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache (`0be47634db0baa9e91c7e635e7e73355d6a5cf43)`
Target:	powerpc-next/versatile_defconfig/arm-gcc4.9
Branch:	powerpc-next
Compiler:	arm-gcc4.9 (arm-linux-gnueabi-gcc (GCC) 4.9.4 / GNU ld (GNU Binutils) 2.29.1.20170915)
Config:	versatile_defconfig (download)
Log:	Download original No warnings found in log. Full Log # git rev-parse -q --verify 0be47634db0baa9e91c7e635e7e73355d6a5cf43^{commit} 0be47634db0baa9e91c7e635e7e73355d6a5cf43 already have revision, skipping fetch # git checkout -q -f -B kisskb 0be47634db0baa9e91c7e635e7e73355d6a5cf43 # git clean -qxdf # < git log -1 # commit 0be47634db0baa9e91c7e635e7e73355d6a5cf43 # Author: Gautham R. Shenoy <ego@linux.vnet.ibm.com> # Date: Thu Dec 10 16:08:59 2020 +0530 # # powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache # # On POWER platforms where only some groups of threads within a core # share the L2-cache (indicated by the ibm,thread-groups device-tree # property), we currently print the incorrect shared_cpu_map/list for # L2-cache in the sysfs. # # This patch reports the correct shared_cpu_map/list on such platforms. # # Example: # On a platform with "ibm,thread-groups" set to # 00000001 00000002 00000004 00000000 # 00000002 00000004 00000006 00000001 # 00000003 00000005 00000007 00000002 # 00000002 00000004 00000000 00000002 # 00000004 00000006 00000001 00000003 # 00000005 00000007 # # This indicates that threads {0,2,4,6} in the core share the L2-cache # and threads {1,3,5,7} in the core share the L2 cache. # # However, without the patch, the shared_cpu_map/list for L2 for CPUs 0, # 1 is reported in the sysfs as follows: # # /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0-7 # /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:000000,000000ff # # /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_list:0-7 # /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:000000,000000ff # # With the patch, the shared_cpu_map/list for L2 cache for CPUs 0, 1 is # correctly reported as follows: # # /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_list:0,2,4,6 # /sys/devices/system/cpu/cpu0/cache/index2/shared_cpu_map:000000,00000055 # # /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_list:1,3,5,7 # /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map:000000,000000aa # # This patch also defines cpu_l2_cache_mask() for !CONFIG_SMP case. # # Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> # Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> # Link: https://lore.kernel.org/r/1607596739-32439-6-git-send-email-ego@linux.vnet.ibm.com # < /opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc --version # < /opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ld --version # < git log --format=%s --max-count=1 0be47634db0baa9e91c7e635e7e73355d6a5cf43 # < make -s -j 120 ARCH=arm O=/kisskb/build/powerpc-next_versatile_defconfig_arm-gcc4.9 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- versatile_defconfig # make -s -j 120 ARCH=arm O=/kisskb/build/powerpc-next_versatile_defconfig_arm-gcc4.9 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-4.9.4-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi- Completed OK # rm -rf /kisskb/build/powerpc-next_versatile_defconfig_arm-gcc4.9 # Build took: 0:00:30.650852

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