# git rev-parse -q --verify fab0fca1da5cdc48be051715cd9787df04fdce3a^{commit} fab0fca1da5cdc48be051715cd9787df04fdce3a already have revision, skipping fetch # git checkout -q -f -B kisskb fab0fca1da5cdc48be051715cd9787df04fdce3a # git clean -qxdf # < git log -1 # commit fab0fca1da5cdc48be051715cd9787df04fdce3a # Merge: ae1985b50afa 7ea4d2329330 # Author: Linus Torvalds # Date: Mon Dec 14 11:47:37 2020 -0800 # # Merge tag 'media/v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media # # Pull media updates from Mauro Carvalho Chehab: # # - some rework at the uAPI pixel format docs # # - the smiapp driver has started to gain support for MIPI CSS camera # sensors and was renamed # # - two new sensor drivers: ov02a10 and ov9734 # # - Meson gained a driver for the 2D acceleration unit # # - Rockchip rkisp1 driver was promoted from staging # # - Cedrus driver gained support for VP8 # # - two new remote controller keymaps were added # # - the usual set of fixes cleanups and driver improvements # # * tag 'media/v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (447 commits) # media: ccs: Add support for obtaining C-PHY configuration from firmware # media: ccs-pll: Print pixel rates # media: ccs: Print written register values # media: ccs: Add support for DDR OP SYS and OP PIX clocks # media: ccs-pll: Add support for DDR OP system and pixel clocks # media: ccs: Dual PLL support # media: ccs-pll: Add trivial dual PLL support # media: ccs-pll: Separate VT divisor limit calculation from the rest # media: ccs-pll: Fix VT post-PLL divisor calculation # media: ccs-pll: Make VT divisors 16-bit # media: ccs-pll: Rework bounds checks # media: ccs-pll: Print relevant information on PLL tree # media: ccs-pll: Better separate OP and VT sub-tree calculation # media: ccs-pll: Check for derating and overrating, support non-derating sensors # media: ccs-pll: Split off VT subtree calculation # media: ccs-pll: Add C-PHY support # media: ccs-pll: Add sanity checks # media: ccs-pll: Add support flexible OP PLL pixel clock divider # media: ccs-pll: Support two cycles per pixel on OP domain # media: ccs-pll: Add support for extended input PLL clock divider # ... # < /opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux-gcc --version # < /opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux-ld --version # < git log --format=%s --max-count=1 fab0fca1da5cdc48be051715cd9787df04fdce3a # < make -s -j 48 ARCH=mips O=/kisskb/build/linus_malta_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- malta_defconfig # < make -s -j 48 ARCH=mips O=/kisskb/build/linus_malta_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- help # make -s -j 48 ARCH=mips O=/kisskb/build/linus_malta_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- olddefconfig # make -s -j 48 ARCH=mips O=/kisskb/build/linus_malta_defconfig_mips-gcc8 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-8.1.0-nolibc/mips-linux/bin/mips-linux- Completed OK # rm -rf /kisskb/build/linus_malta_defconfig_mips-gcc8 # Build took: 0:02:38.182256