# git rev-parse -q --verify 70868a180501d17fea58153c649d56bc18435315^{commit} 70868a180501d17fea58153c649d56bc18435315 already have revision, skipping fetch # git checkout -q -f -B kisskb 70868a180501d17fea58153c649d56bc18435315 # git clean -qxdf # < git log -1 # commit 70868a180501d17fea58153c649d56bc18435315 # Merge: 2e5fd489a4e5 2b922a9d064f # Author: Linus Torvalds # Date: Thu Sep 9 11:48:27 2021 -0700 # # Merge tag 'cxl-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl # # Pull CXL (Compute Express Link) updates from Dan Williams: # # - Fix detection of CXL host bridges to filter out disabled ACPI0016 # devices in the ACPI DSDT. # # - Fix kernel lockdown integration to disable raw commands when raw PCI # access is disabled. # # - Fix a broken debug message. # # - Add support for "Get Partition Info". I.e. enumerate the split # between volatile and persistent capacity on bi-modal CXL memory # expanders. # # - Re-factor the core by subject area. This is a work in progress. # # - Prepare libnvdimm to understand CXL labels in addition to EFI labels. # This is a work in progress. # # * tag 'cxl-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (25 commits) # cxl/registers: Fix Documentation warning # cxl/pmem: Fix Documentation warning # cxl/uapi: Fix defined but not used warnings # cxl/pci: Fix debug message in cxl_probe_regs() # cxl/pci: Fix lockdown level # cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge ports # libnvdimm/labels: Add claim class helpers # libnvdimm/labels: Add type-guid helpers # libnvdimm/labels: Add blk special cases for nlabel and position helpers # libnvdimm/labels: Add blk isetcookie set / validation helpers # libnvdimm/labels: Add a checksum calculation helper # libnvdimm/labels: Introduce label setter helpers # libnvdimm/labels: Add isetcookie validation helper # libnvdimm/labels: Introduce getters for namespace label fields # cxl/mem: Adjust ram/pmem range to represent DPA ranges # cxl/mem: Account for partitionable space in ram/pmem ranges # cxl/pci: Store memory capacity values # cxl/pci: Simplify register setup # cxl/pci: Ignore unknown register block types # cxl/core: Move memdev management to core # ... # < /opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-gcc --version # < /opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux-ld --version # < git log --format=%s --max-count=1 70868a180501d17fea58153c649d56bc18435315 # < make -s -j 32 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux- allnoconfig # < make -s -j 32 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux- help # make -s -j 32 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux- olddefconfig # make -s -j 32 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa CROSS_COMPILE=/opt/cross/kisskb/br-xtensa-full-2016.08-613-ge98b4dd/bin/xtensa-linux- Completed OK # rm -rf /kisskb/build/linus_xtensa-allnoconfig_xtensa # Build took: 0:00:16.503379