# git rev-parse -q --verify 455e73a07f6e288b0061dfcf4fcf54fa9fe06458^{commit}
455e73a07f6e288b0061dfcf4fcf54fa9fe06458
already have revision, skipping fetch
# git checkout -q -f -B kisskb 455e73a07f6e288b0061dfcf4fcf54fa9fe06458
# git clean -qxdf
# < git log -1
# commit 455e73a07f6e288b0061dfcf4fcf54fa9fe06458
# Merge: d9b5941bb593 4afd2a9355a9
# Author: Linus Torvalds <torvalds@linux-foundation.org>
# Date:   Wed Jan 12 17:02:27 2022 -0800
# 
#     Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
#     
#     Pull clk updates from Stephen Boyd:
#      "We have a couple patches in the framework core this time around but
#       they're mostly minor cleanups and some debugfs stuff. The real work
#       that's in here is the typical pile of clk driver updates and new SoC
#       support.
#     
#       Per usual (or maybe just recent trends), Qualcomm gains a handful of
#       SoC drivers additions and has the largest diffstat. After that there
#       are quite a few updates to the Allwinner (sunxi) drivers to support
#       modular drivers and Renesas is heavily updated to add more support for
#       various clks.
#     
#       Overall it looks pretty normal.
#     
#       New Drivers:
#        - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
#        - MediaTek mt7986 SoC basic support
#        - Clock and reset driver for Toshiba Visconti SoCs
#        - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
#        - Allwinner D1 clks
#        - Lan966x Generic Clock Controller driver and associated DT bindings
#        - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
#        - Qualcomm SDX65 and SM8450 RPMh clks
#     
#       Updates:
#        - Set suppress_bind_attrs to true for i.MX8ULP driver
#        - Switch from do_div to div64_ul for throughout all i.MX drivers
#        - Fix imx8mn_clko1_sels for i.MX8MN
#        - Remove unused IPG_AUDIO_ROOT from i.MX8MP
#        - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
#        - Removal of all remaining uses of __clk_lookup() in
#          drivers/clk/samsung
#        - Refactoring of the CPU clocks registration to use common interface
#        - An update of the Exynos850 driver (support for more clock domains)
#          required by the E850-96 development board
#        - Prep for runtime PM and generic power domains on Tegra
#        - Support modular Allwinner clk drivers via platform bus
#        - Lan966x clock driver extended to support clock gating
#        - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
#          thermal (TSU) clocks and resets on Renesas RZ/G2L
#        - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
#          clock drivers, and in the Renesas SDHI driver
#        - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
#        - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
#        - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
#        - Add GPU clock and resets on Renesas RZ/G2L
#        - Add clk-provider.h to various Qualcomm clk drivers
#        - devm version of clk_hw_register_gate()
#        - kerneldoc fixes in a couple drivers"
#     
#     * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
#       clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
#       clk: mediatek: add mt7986 clock support
#       clk: mediatek: add mt7986 clock IDs
#       dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
#       clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
#       clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
#       clk: x86: Fix clk_gate_flags for RV_CLK_GATE
#       clk: x86: Use dynamic con_id string during clk registration
#       ACPI: APD: Add a fmw property clk-name
#       drivers: acpi: acpi_apd: Remove unused device property "is-rv"
#       x86: clk: clk-fch: Add support for newer family of AMD's SOC
#       clk: ingenic: Add MDMA and BDMA clocks
#       dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
#       clk: bm1880: remove kfrees on static allocations
#       clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
#       clk: st: clkgen-mux: search reg within node or parent
#       clk: st: clkgen-fsyn: search reg within node or parent
#       clk: Enable/Disable runtime PM for clk_summary
#       MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
#       clk: visconti: Add support common clock driver and reset driver
#       ...
# < /opt/cross/kisskb/br-sparc64-full-2016.08-613-ge98b4dd/bin/sparc64-linux-gcc --version
# < /opt/cross/kisskb/br-sparc64-full-2016.08-613-ge98b4dd/bin/sparc64-linux-ld --version
# < git log --format=%s --max-count=1 455e73a07f6e288b0061dfcf4fcf54fa9fe06458
# < make -s -j 8 ARCH=sparc O=/kisskb/build/linus_sparc-defconfig_sparc64 CROSS_COMPILE=/opt/cross/kisskb/br-sparc64-full-2016.08-613-ge98b4dd/bin/sparc64-linux-  defconfig
# < make -s -j 8 ARCH=sparc O=/kisskb/build/linus_sparc-defconfig_sparc64 CROSS_COMPILE=/opt/cross/kisskb/br-sparc64-full-2016.08-613-ge98b4dd/bin/sparc64-linux-  help
# make -s -j 8 ARCH=sparc O=/kisskb/build/linus_sparc-defconfig_sparc64 CROSS_COMPILE=/opt/cross/kisskb/br-sparc64-full-2016.08-613-ge98b4dd/bin/sparc64-linux-  olddefconfig
# make -s -j 8 ARCH=sparc O=/kisskb/build/linus_sparc-defconfig_sparc64 CROSS_COMPILE=/opt/cross/kisskb/br-sparc64-full-2016.08-613-ge98b4dd/bin/sparc64-linux-  
<stdin>:1517:2: warning: #warning syscall clone3 not implemented [-Wcpp]
  kernel: arch/sparc/boot/image is ready
  kernel: arch/sparc/boot/zImage is ready
Completed OK
# rm -rf /kisskb/build/linus_sparc-defconfig_sparc64
# Build took: 0:01:18.277822