# git rev-parse -q --verify aa5b537b0ecc16992577b013f11112d54c7ce869^{commit}
aa5b537b0ecc16992577b013f11112d54c7ce869
already have revision, skipping fetch
# git checkout -q -f -B kisskb aa5b537b0ecc16992577b013f11112d54c7ce869
# git clean -qxdf
# < git log -1
# commit aa5b537b0ecc16992577b013f11112d54c7ce869
# Merge: d710d370c491 bbde015227e8
# Author: Linus Torvalds <torvalds@linux-foundation.org>
# Date:   Fri Mar 25 10:11:38 2022 -0700
# 
#     Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
#     
#     Pull RISC-V updates from Palmer Dabbelt:
#     
#      - Support for Sv57-based virtual memory.
#     
#      - Various improvements for the MicroChip PolarFire SOC and the
#        associated Icicle dev board, which should allow upstream kernels to
#        boot without any additional modifications.
#     
#      - An improved memmove() implementation.
#     
#      - Support for the new Ssconfpmf and SBI PMU extensions, which allows
#        for a much more useful perf implementation on RISC-V systems.
#     
#      - Support for restartable sequences.
#     
#     * tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (36 commits)
#       rseq/selftests: Add support for RISC-V
#       RISC-V: Add support for restartable sequence
#       MAINTAINERS: Add entry for RISC-V PMU drivers
#       Documentation: riscv: Remove the old documentation
#       RISC-V: Add sscofpmf extension support
#       RISC-V: Add perf platform driver based on SBI PMU extension
#       RISC-V: Add RISC-V SBI PMU extension definitions
#       RISC-V: Add a simple platform driver for RISC-V legacy perf
#       RISC-V: Add a perf core library for pmu drivers
#       RISC-V: Add CSR encodings for all HPMCOUNTERS
#       RISC-V: Remove the current perf implementation
#       RISC-V: Improve /proc/cpuinfo output for ISA extensions
#       RISC-V: Do no continue isa string parsing without correct XLEN
#       RISC-V: Implement multi-letter ISA extension probing framework
#       RISC-V: Extract multi-letter extension names from "riscv, isa"
#       RISC-V: Minimal parser for "riscv, isa" strings
#       RISC-V: Correctly print supported extensions
#       riscv: Fixed misaligned memory access. Fixed pointer comparison.
#       MAINTAINERS: update riscv/microchip entry
#       riscv: dts: microchip: add new peripherals to icicle kit device tree
#       ...
# < /opt/cross/kisskb/fe-x86-64-core-i7-2017.05/bin/x86_64-linux-gcc --version
# < /opt/cross/kisskb/fe-x86-64-core-i7-2017.05/bin/x86_64-linux-ld --version
# < git log --format=%s --max-count=1 aa5b537b0ecc16992577b013f11112d54c7ce869
# < make -s -j 32 ARCH=um O=/kisskb/build/linus_um-defconfig_um-x86_64 CROSS_COMPILE=/opt/cross/kisskb/fe-x86-64-core-i7-2017.05/bin/x86_64-linux- SUBARCH=x86_64 defconfig
# < make -s -j 32 ARCH=um O=/kisskb/build/linus_um-defconfig_um-x86_64 CROSS_COMPILE=/opt/cross/kisskb/fe-x86-64-core-i7-2017.05/bin/x86_64-linux- SUBARCH=x86_64 help
# make -s -j 32 ARCH=um O=/kisskb/build/linus_um-defconfig_um-x86_64 CROSS_COMPILE=/opt/cross/kisskb/fe-x86-64-core-i7-2017.05/bin/x86_64-linux- SUBARCH=x86_64 olddefconfig
# make -s -j 32 ARCH=um O=/kisskb/build/linus_um-defconfig_um-x86_64 CROSS_COMPILE=/opt/cross/kisskb/fe-x86-64-core-i7-2017.05/bin/x86_64-linux- SUBARCH=x86_64 
  LINK linux
Completed OK
# rm -rf /kisskb/build/linus_um-defconfig_um-x86_64
# Build took: 0:00:45.041959