# git rev-parse -q --verify 9de1f9c8ca5100a02a2e271bdbde36202e251b4b^{commit}
9de1f9c8ca5100a02a2e271bdbde36202e251b4b
already have revision, skipping fetch
# git checkout -q -f -B kisskb 9de1f9c8ca5100a02a2e271bdbde36202e251b4b
# git clean -qxdf
# < git log -1
# commit 9de1f9c8ca5100a02a2e271bdbde36202e251b4b
# Merge: dfea84827f7e 779fda86bdeb
# Author: Linus Torvalds <torvalds@linux-foundation.org>
# Date:   Mon Aug 1 12:48:15 2022 -0700
# 
#     Merge tag 'irq-core-2022-08-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
#     
#     Pull irq updates from Thomas Gleixner:
#      "Updates for interrupt core and drivers:
#     
#       Core:
#     
#        - Fix a few inconsistencies between UP and SMP vs interrupt
#          affinities
#     
#        - Small updates and cleanups all over the place
#     
#       New drivers:
#     
#        - LoongArch interrupt controller
#     
#        - Renesas RZ/G2L interrupt controller
#     
#       Updates:
#     
#        - Hotpath optimization for SiFive PLIC
#     
#        - Workaround for broken PLIC edge triggered interrupts
#     
#        - Simall cleanups and improvements as usual"
#     
#     * tag 'irq-core-2022-08-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (52 commits)
#       irqchip/mmp: Declare init functions in common header file
#       irqchip/mips-gic: Check the return value of ioremap() in gic_of_init()
#       genirq: Use for_each_action_of_desc in actions_show()
#       irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch
#       irqchip: Add LoongArch CPU interrupt controller support
#       irqchip: Add Loongson Extended I/O interrupt controller support
#       irqchip/loongson-liointc: Add ACPI init support
#       irqchip/loongson-pch-msi: Add ACPI init support
#       irqchip/loongson-pch-pic: Add ACPI init support
#       irqchip: Add Loongson PCH LPC controller support
#       LoongArch: Prepare to support multiple pch-pic and pch-msi irqdomain
#       LoongArch: Use ACPI_GENERIC_GSI for gsi handling
#       genirq/generic_chip: Export irq_unmap_generic_chip
#       ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback
#       APCI: irq: Add support for multiple GSI domains
#       LoongArch: Provisionally add ACPICA data structures
#       irqdomain: Use hwirq_max instead of revmap_size for NOMAP domains
#       irqdomain: Report irq number for NOMAP domains
#       irqchip/gic-v3: Fix comment typo
#       dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/V2L SoC
#       ...
# < /opt/cross/kisskb/korg/gcc-11.1.0-nolibc/mips-linux/bin/mips-linux-gcc --version
# < /opt/cross/kisskb/korg/gcc-11.1.0-nolibc/mips-linux/bin/mips-linux-ld --version
# < git log --format=%s --max-count=1 9de1f9c8ca5100a02a2e271bdbde36202e251b4b
# < make -s -j 40 ARCH=mips O=/kisskb/build/linus_32r6_defconfig_mips-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.1.0-nolibc/mips-linux/bin/mips-linux-  32r6_defconfig
./.config.32r6_defconfig:96:warning: override: CPU_BIG_ENDIAN changes choice state
.config:95:warning: override: CPU_BIG_ENDIAN changes choice state
# < make -s -j 40 ARCH=mips O=/kisskb/build/linus_32r6_defconfig_mips-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.1.0-nolibc/mips-linux/bin/mips-linux-  help
# make -s -j 40 ARCH=mips O=/kisskb/build/linus_32r6_defconfig_mips-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.1.0-nolibc/mips-linux/bin/mips-linux-  olddefconfig
# make -s -j 40 ARCH=mips O=/kisskb/build/linus_32r6_defconfig_mips-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.1.0-nolibc/mips-linux/bin/mips-linux-  
/kisskb/src/arch/mips/boot/dts/img/boston.dts:128.19-178.5: Warning (pci_device_reg): /pci@14000000/pci2_root@0,0,0: PCI unit address format error, expected "0,0"
Completed OK
# rm -rf /kisskb/build/linus_32r6_defconfig_mips-gcc11
# Build took: 0:01:02.345333