# git rev-parse -q --verify 1ec35eadc3b448c91a6b763371a7073444e95f9d^{commit} 1ec35eadc3b448c91a6b763371a7073444e95f9d already have revision, skipping fetch # git checkout -q -f -B kisskb 1ec35eadc3b448c91a6b763371a7073444e95f9d # git clean -qxdf # < git log -1 # commit 1ec35eadc3b448c91a6b763371a7073444e95f9d # Merge: 562ed38ded83 b64baafa24d2 # Author: Linus Torvalds # Date: Sat Feb 25 15:16:23 2023 -0800 # # Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux # # Pull clk updates from Stephen Boyd: # "We have one small patch to the clk core this time around. It fixes a # corner case with the CLK_OPS_PARENT_ENABLE flag combined with # clk_core_is_enabled() where it hangs the system. We'll simply assume # the clk is disabled if the parent is disabled and the flag is set. # Trying to turn on the parent to check the enable state of the clk runs # into system hangs at boot. We let this bake in -next for a couple # weeks to make sure there aren't any more issues because the last # attempt to fix this ran into hangs and had to be reverted. # # Note: There were some more patches to the core framework around # sync_state and disabling unused clks, but I asked for that to be # reverted from the qcom PR because it isn't ready and we're still # discussing the best solution on the list. # # Outside of the core clk framework, we have the usual collection of clk # driver updates and support for new SoCs (which seems to never stop). # The dirstat is dominated by Qualcomm because they added support for # quite a few SoCs this time around and also migrated quite a few of # their drivers to clk_parent_data. The other big diff is in the # Mediatek clk drivers that saw a significant rework this cycle to # similarly modernize the code, and we'll see that work continue in the # next cycle as well. Nothing really jumps out as scary here, except # that the significant churn in parent data descriptions can have typos # that go unnoticed. More details below. # # Core: # - Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() # # New Drivers: # - Add a new clk-gpr-mux clock type and use it on i.MX6Q to add ENET # ref clocks # - Support for Mediatek MT7891 SoC clks # - Support for many Qualcomm clk controllers: # - QDU1000/QRU1000 global clock controller # - SA8775P global clock controller # - SM8550 TCSR and display clock controller # - SM6350 clock controller # - MSM8996 CBF and APCS clock controllers # # Updates: # - Various cleanups and improvements to Mediatek clk drivers to reduce # code size and modernize the drivers # - Support for Versa 5P49V60 clks # - Disable R-Car H3 ES1.*, as it was only available to an internal # development group and needed a lot of quirks and workarounds # - Add PWM, Compare-Match Timer (TIM), USB, SDHI, and eMMC clocks and # resets on Renesas RZ/V2M # - Add display clocks on Renesas R-Car V4H # - Add Camera Receiving Unit (CRU) clocks and resets on Renesas RZ/G2L # - Free the imx_uart_clocks even if imx_register_uart_clocks returns # early # - Get the stdout clocks count from device tree on i.MX # - Drop the clock count argument from imx_register_uart_clocks() # - Keep the uart clocks on i.MX93 for when earlycon is used # - Fix SPDX comment in i.MX6SLL clocks bindings header # - Drop some unnecessary spaces from i.MX8ULP clocks bindings header # - Add imx_obtain_fixed_of_clock() for allowing to add a clock that is # not configured via devicetree # - Fix the ENET1 gate configuration for i.MX6UL according to the # reference manual # - Add ENET refclock mux support for i.MX6UL # - Add support for USB host/device configuration on Renesas RZ/N1 # - Add PLL2 programming support, and CAN-FD clocks on Renesas R-Car # V4H # - Add D1 CAN bus gates and resets for Allwinner # - Mark D1 CPUX clock as critical on Allwinner # - Reuse D1 driver for Allwinner R528/T113 # - Cleanup sunxi-ng Kconfig # - Fix sunxi-ng kernel-doc issues # - Model Allwinner H3/H5 DRAM clock as fixed clock # - Use .determine_rate() instead of .round_rate() for the dualdiv, # mpll, sclk-div and cpu-dyn-div amlogic clock drivers # - DDR clocks were marked as critical in the proper clock driver for # each AT91 SoC such that drivers/memory/atmel-sdramc.c to be deleted # in the next releases as it only does clock enablement # - Patch to avoid compiling dt-compat.o for all AT91 SoCs as only some # of them may use it # - Support synchronous power_off requests in the qcom GDSC driver for # proper GPU power collapse # - Drop test clocks from various Qualcomm clk drivers # - Update parent references to use clk_parent_data/clk_hw in various # Qualcomm clk drivers # - Fixes for the Qualcomm MSM8996 CPU clock controller # - Transition Qualcomm MSM8974 GCC off the externally defined # sleep_clk # - Add GDSCs in the global clock controller for Qualcomm QCS404 # - The SDCC core clocks on Qualcomm SM6115 are moved to floor_ops # - Programming of clk_dis_wait for GPU CX GDSC on Qualcomm SC7180 and # SDM845 are moved to use the recently introduced properties in the # GDSC struct # - Qualcomm's RPMh clock driver gains SM8550 and SA8775P clocks, and # the IPA clock is added on a variety of platforms # - De-duplicate identical clks in Qualcomm SMD RPM clk driver # - Add a few missing clocks across msm8998, msm8992, msm8916, qcs404 # to Qualcomm SDM RPM clk driver # - Various Qualcomm clk drivers use devm_pm_runtime_enable() to # simplify" # # * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (228 commits) # clk: qcom: apcs-msm8986: Include bitfield.h for FIELD_PREP # clk: qcom: Revert sync_state based clk_disable_unused # clk: imx: pll14xx: fix recalc_rate for negative kdiv # clk: rs9: Drop unused pin_xin field # MAINTAINERS: clk: imx: Add Peng Fan as reviewer # clk: sprd: Add dependency for SPRD_UMS512_CLK # clk: ralink: fix 'mt7621_gate_is_enabled()' function # clk: mediatek: clk-mtk: Remove unneeded semicolon # dt-bindings: clock: remove stih416 bindings # dt-bindings: clock: add loongson-2 clock # dt-bindings: clock: add loongson-2 clock include file # clk: imx: fix compile testing imxrt1050 # clk: Honor CLK_OPS_PARENT_ENABLE in clk_core_is_enabled() # clk: imx: set imx_clk_gpr_mux_ops storage-class-specifier to static # clk: renesas: rcar-gen3: Disable R-Car H3 ES1.* # dt-bindings: clock: Merge qcom,gpucc-sm8350 into qcom,gpucc.yaml # clk: qcom: gpucc-sdm845: fix clk_dis_wait being programmed for CX GDSC # clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC # dt-bindings: clock: qcom,sa8775p-gcc: add the power-domains property # clk: qcom: cpu-8996: add missing cputype include # ... # < /opt/cross/kisskb/korg/gcc-11.3.0-nolibc/xtensa-linux/bin/xtensa-linux-gcc --version # < /opt/cross/kisskb/korg/gcc-11.3.0-nolibc/xtensa-linux/bin/xtensa-linux-ld --version # < git log --format=%s --max-count=1 1ec35eadc3b448c91a6b763371a7073444e95f9d # < make -s -j 160 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.3.0-nolibc/xtensa-linux/bin/xtensa-linux- allnoconfig # < make -s -j 160 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.3.0-nolibc/xtensa-linux/bin/xtensa-linux- help # make -s -j 160 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.3.0-nolibc/xtensa-linux/bin/xtensa-linux- olddefconfig # make -s -j 160 ARCH=xtensa O=/kisskb/build/linus_xtensa-allnoconfig_xtensa-gcc11 CROSS_COMPILE=/opt/cross/kisskb/korg/gcc-11.3.0-nolibc/xtensa-linux/bin/xtensa-linux- Completed OK # rm -rf /kisskb/build/linus_xtensa-allnoconfig_xtensa-gcc11 # Build took: 0:00:35.684508