Buildresult: linus/um-defconfig/um-x86_64-gcc12 built on Jul 21, 03:57

kisskb

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Status:	OK
Date/Time:	Jul 21, 03:57
Duration:	0:00:35.516628
Builder:	ka4
Revision:	Merge tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (`f557af081de6b45a25e27d633b4d8d2dbc2f428e)`
Target:	linus/um-defconfig/um-x86_64-gcc12
Branch:	linus
Compiler:	um-x86_64-gcc12 (x86_64-linux-gcc.br_real (Buildroot 2021.11-4428-g6b6741b) 12.2.0 / GNU ld (GNU Binutils) 2.39)
Config:	defconfig (download)
Log:	Download original No warnings found in log. Full Log # git rev-parse -q --verify f557af081de6b45a25e27d633b4d8d2dbc2f428e^{commit} f557af081de6b45a25e27d633b4d8d2dbc2f428e already have revision, skipping fetch # git checkout -q -f -B kisskb f557af081de6b45a25e27d633b4d8d2dbc2f428e # git clean -qxdf # < git log -1 # commit f557af081de6b45a25e27d633b4d8d2dbc2f428e # Merge: d2be38b9a551 93b63f68d00a # Author: Linus Torvalds <torvalds@linux-foundation.org> # Date: Sat Jul 20 09:11:27 2024 -0700 # # Merge tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux # # Pull RISC-V updates from Palmer Dabbelt: # # - Support for various new ISA extensions: # * The Zve32[xf] and Zve64[xfd] sub-extensios of the vector # extension # * Zimop and Zcmop for may-be-operations # * The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension # * Zawrs # # - riscv,cpu-intc is now dtschema # # - A handful of performance improvements and cleanups to text patching # # - Support for memory hot{,un}plug # # - The highest user-allocatable virtual address is now visible in # hwprobe # # * tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (58 commits) # riscv: lib: relax assembly constraints in hweight # riscv: set trap vector earlier # KVM: riscv: selftests: Add Zawrs extension to get-reg-list test # KVM: riscv: Support guest wrs.nto # riscv: hwprobe: export Zawrs ISA extension # riscv: Add Zawrs support for spinlocks # dt-bindings: riscv: Add Zawrs ISA extension description # riscv: Provide a definition for 'pause' # riscv: hwprobe: export highest virtual userspace address # riscv: Improve sbi_ecall() code generation by reordering arguments # riscv: Add tracepoints for SBI calls and returns # riscv: Optimize crc32 with Zbc extension # riscv: Enable DAX VMEMMAP optimization # riscv: mm: Add support for ZONE_DEVICE # virtio-mem: Enable virtio-mem for RISC-V # riscv: Enable memory hotplugging for RISC-V # riscv: mm: Take memory hotplug read-lock during kernel page table dump # riscv: mm: Add memory hotplugging support # riscv: mm: Add pfn_to_kaddr() implementation # riscv: mm: Refactor create_linear_mapping_range() for memory hot add # ... # < /opt/cross/kisskb/x86-64--glibc--bleeding-edge-2022.08-1/bin/x86_64-linux-gcc --version # < /opt/cross/kisskb/x86-64--glibc--bleeding-edge-2022.08-1/bin/x86_64-linux-ld --version # < git log --format=%s --max-count=1 f557af081de6b45a25e27d633b4d8d2dbc2f428e # make -s -j 40 ARCH=um O=/kisskb/build/linus_defconfig_um-x86_64-gcc12 CROSS_COMPILE=/opt/cross/kisskb/x86-64--glibc--bleeding-edge-2022.08-1/bin/x86_64-linux- SUBARCH=x86_64 defconfig # < make -s -j 40 ARCH=um O=/kisskb/build/linus_defconfig_um-x86_64-gcc12 CROSS_COMPILE=/opt/cross/kisskb/x86-64--glibc--bleeding-edge-2022.08-1/bin/x86_64-linux- SUBARCH=x86_64 help # make -s -j 40 ARCH=um O=/kisskb/build/linus_defconfig_um-x86_64-gcc12 CROSS_COMPILE=/opt/cross/kisskb/x86-64--glibc--bleeding-edge-2022.08-1/bin/x86_64-linux- SUBARCH=x86_64 olddefconfig # make -s -j 40 ARCH=um O=/kisskb/build/linus_defconfig_um-x86_64-gcc12 CROSS_COMPILE=/opt/cross/kisskb/x86-64--glibc--bleeding-edge-2022.08-1/bin/x86_64-linux- SUBARCH=x86_64 LINK linux Completed OK # rm -rf /kisskb/build/linus_defconfig_um-x86_64-gcc12 # Build took: 0:00:35.516628

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